Memory

  • db - declare byte (8b)
  • dw - declare word (16b)
  • dd - declare doubleword (dword) (32b)
  • dq - declare quadword (qword) (64b)
a db 5
b db 10, 20 ;basically an array with 2 elements
ten equ 10  ;ten is a constant
c dw 0123h, 0ABCDh, 0xAB12 ;if a hexa number starts 
						   ;with a letter 
				   ;you must precede it with a 0,
				   ;the assembler will consider it a
				   ;variable         
 

a isn’t a value, it is the address of the data segment plus an offset ten doesn’t reserve memory

Endianness

Intel proccessors are little endian, = The reason for this is that the least significant bits are put first, because they have a lower index

a db 001101b       ;binary number
b db 'a', "abcd",0 ;you have to put the null terminator 
				   ;manually

List of registers

  • EAX,EBX,ECX,EDX,ESI,EDI - all purpose registers
  • ESP, EBP, EIP, EFLAGS - control registers, don’t use

Instructions

MOV instruction

mov destination, source MOV EAX, 2; register, immediate MOV EAX, ten; register immediate; <=> MOV EAX, 10

Important

You cannot have both operands of type memory

MOV BYTE [a], 10 MOV [a], 10 is wrong because the assembler must know the size to overwrite. MOV a, 10 is wrong because it replaces the address, not the content at that address. MOV EAX, [a] will read 4 bytes starting from a, (because it knows how big EAX is) MOV EAX, BYTE [a] wrong because operand sizes must be equal MOV AL, BYTE [a]

ADD instruction

ADD dest, source <=> dest=dest+source

SUB instruction

SUB dest, source <=> dest=dest-source

MUL instruction

MUL BX<=>BX\*AX=DX:AX

DIV instruction

DIV BX ;DX:AX/BX AX - quotient, DX - Remainder

Convert instructions for signed numbers

CBW, CWD, CWDE, CDQ (fill the higher part with the most significant digit) CBW ALAX (signed conversion) CWS AXDX:AX, AX= CWD DX CWDE AX EAX CDQ EAXEDX:EAX

Example

a db 5
b dw 320 ;a+b
mov AL, BYTE [a]
mov AH, 0
add AX, WORD [b]

unsigned 251, signed -5 (2’s complement)

Exercise

data
a db -10
b dw 325
c db 5
d resw 1 ; d = a+b-c
code 
start:
MOV AL, [a]
MOV AH, 0
CBW
ADD AX, [b]
MOV BX, AX
MOV AL, [c]
CBW
SUB BX, AX
MOV [d], BX